Friday, May 9, 2008

Athlon 64 features

There are four variants: Athlon 64, Athlon 64 FX, Mobile Athlon 64 (later renamed "Turion 64") and the dual-core Athlon 64 X2.[39] Common among the Athlon 64 line are a variety of instruction sets including MMX, 3DNow!, SSE, SSE2, and SSE3.[40] All Athlon 64s also support the NX bit, a security feature named "Enhanced Virus Protection" by AMD.[41] And as implementations of the AMD64 architecture, all Athlon 64 variants are able to run 16 bit, 32 bit x86, and AMD64 code, through two different modes the processor can run in: "Legacy mode" and "long mode". Legacy mode runs 16-bit and 32-bit programs natively, and long mode runs 64-bit programs natively, but also allows for 32-bit programs running inside a 64-bit operating system.[42] All Athlon 64 processors feature 128 kibibytes of level 1 cache, and at least 512 kibibytes of level 2 cache.[40]

The Athlon 64 features an on-die memory controller,[5] a feature not previously seen on x86 CPUs. Not only does this mean the controller runs at the same clock rate as the CPU itself, it also means the electrical signals have a shorter physical distance to travel compared to the old northbridge interfaces.[43] The result is a significant reduction in latency (response time) for access requests to main memory.[44] The lower latency is often cited as one of the advantages of the Athlon 64's architecture over those of its competitors.[45]

Translation Lookaside Buffers (TLBs) have also been enlarged (40 4k/2M/4M entries in L1 cache, 512 4k entries),[46] with reduced latencies and improved branch prediction, with four times the number of bimodal counters in the global history counter.[42] This and other architectural enhancements, especially as regards SSE implementation, improve instruction per cycle (IPC) performance over the previous Athlon XP generation.[42] To make this easier for consumers to understand, AMD has chosen to market the Athlon 64 using a PR (Performance Rating) system, where the numbers roughly map to Pentium 4 performance equivalents, rather than actual clock speed.[47]

Athlon 64 also features CPU speed throttling technology branded Cool'n'Quiet, a feature similar to Intel's SpeedStep that can throttle the processor's clock speed back to facilitate lower power consumption and heat production.[48] When the user is running undemanding applications and the load on the processor is light, the processor's clock speed and voltage are reduced. This in turn reduces its peak power consumption (max TDP set at 89 W by AMD) to as low as 32 W (stepping C0, clock speed reduced to 800 MHz) or 22W (stepping CG, clock speed reduced to 1 GHz). The Athlon 64 also has an Integrated Heat Spreader (IHS) which prevents the CPU core from accidentally being damaged when mounting and unmounting cooling solutions. With prior AMD CPUs a CPU shim could be used by people worried about damaging the core.

The No Execute bit (NX bit) supported by Windows Vista, Windows XP Service Pack 2,[49] Windows XP Professional x64 Edition, Windows Server 2003 x64 Edition, and Linux 2.6.8 and higher is also included, for improved protection from malicious buffer overflow security threats. Hardware-set permission levels make it much more difficult for malicious code to take control of the system. It is intended to make 64-bit computing a more secure environment.

The Athlon 64 CPUs have been produced with 130 nm and 90 nm SOI process technologies.[50] All of the latest chips (Winchester, Venice and San Diego models) are on 90 nm. The Venice and San Diego models also incorporate dual stress liner technology[51] (an amalgam of strained silicon and 'squeezed silicon', the latter of which is not actually a technology) co-developed with IBM.[52]

As the memory controller is integrated onto the CPU die, there is no FSB for the system memory to base its speed upon.[53] Instead, system memory speed is obtained by using the following formula (using the ceiling function):[54]

\frac{\mathrm{CPU~speed}}{\left\lceil\frac{\mathrm{CPU~multiplier}}{\mathrm{DRAM~divider}}\right\rceil}=\mathrm{DRAM~speed}

In simpler terms, the memory is always running at a set fraction of the CPU speed, with the divisor being a whole number. A 'FSB' figure is still used to determine the CPU speed, but the RAM speed is no longer directly related to this 'FSB' figure (known otherwise as the LDT).

To summarize, the Athlon 64 architecture features two buses from the CPU. One is the HT bus to the northbridge connecting the CPU to the chipset and device attachment bus (PCIe, AGP, PCI) and the other is the memory bus which connects the on-board memory controller to the bank of either DDR or DDR2 DRAM.

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